Asynchronous design is the study of circuits without a global clock. It is in contrast to synchronous design that relies on a global clock distributed to all sequential elements whose periodic nature provides a simplified discretized time model of system behavior. This model assumes that the clock is distributed across the chip and arrives at all the sequential elements nearly simultaneously, providing a unied time when all state is updated.

The problem of synchronous design is that the simplified model belies the underlying physics  of modern and future technologies for which 1) increasing wire delay and increasing variations make simultaneous arrival times increasingly difficult to achieve 2) the economics warrant extensive module re-use which have different and sometimes inconsistent clocking constraints and 3) the interface to the analog world do not adhere to such a simplified model.

The result is that asynchronous researchers have produced a range of techniques, that span support for point-to-point communication between different synchronous islands which are asynchronous to each, network-on-chips that facilitate communication among a collection of synchronous islands, and a variety of techniques to create asynchronous islands, either targeting high-performance, low-power, low-energy, or other application-specific requirements (e.g., the creation of low electromagnetic interference, resilience to soft-errors, robustness to extreme process variations, support of wide operating ranges, and support for next-generation non-CMOS technologies).

For each of these domains, active research has been performed across both industry and academia, spanning the Americas, Europe, and Asia. Numerous startup companies have sought to disrupt various markets using asynchronous design, including general-purpose processors, networking chips, chips with high security and assurances, and vision processing and machine learning for the internet-of-things markets.  Moreover, the problems associated with crossing clock domains and efficiently interfacing with the analog world is an evolving challenge as community technology evolves and new objective functions become important.

Because the community of asynchronous researchers active in this area spans the globe it is important to have regular activities for them to share experiences and shape the future.  The IEEE Symposium on Asynchronous Circuits and Systems (ASYNC) is the leading conference in this area and is planned to occur in Japan in May, 2019. However, the symposium does not provide the opportunity for researchers to present position papers, discuss and debate the various benefits of different research directions, as well as plan collaborations where they make sense.

We believe that this type of interaction can be a catalyst and guide for the future of this area and that a Shonan meeting planned just after ASYNC can achieve these goals.  We propose a theme of the past, present, and future of asynchronous circuits. The past we think is an important element of this meeting, as many start-up lessons in this community have failed and the reasons why are not often discussed. Yet, we as a community can learn from these lessons, as the next generation of asynchronous entrepreneurs actively seek to change the world. Moreover, the past is fundamental to re-search as many older ideas become more practical as technology evolves. While past research is embodied in papers for eternity,  it is not a replacement of face-to-face discussions among the old and new generation of asynchronous academics.

At present, there are at least four startups actively working on commercializing asynchronous designs and signficant activity in multiple large VLSI companies. Understanding the challenges they are facing and guiding them with the collective knowledge of the community will enhance the chances of their success; a success which will help the entire community. Nevertheless, one common concern that all researchers in this community may have is that the asynchronous design style is not yet popular in practical VLSI design. Actually, it is fair to say that we all striving towards the same goal { making asynchronous design a mainstream design style. Thus, as a main and specific theme of this meeting, we propose discussing how best to change the world using asynchronous design technologies in the near future. The future indeed is providing a plethora of opportunities as we are facing the slowing down of Moore’s law and the gaining of interest in alternative computing technologies and frameworks, including new non-volatile technologies, three-dimensional VLSI integration, superconductive technologies as well as an explosion of interest in neuromorphic and machine learning styles of computation. All of them have potential to be strongly enhanced under the asynchronous design style, but achieving high impact may require greater forms of collaboration than we have had in the past. We thus believe that it is very valuable for researchers who specialize in these different technologies to have in-person discussions on the common goal to change the world using asynchronous design and the best strategies to achieve this goal.

To achieve these goals we propose to invite a wide-variety of researchers, providing them with an opportunity to present their past experiences, present efforts, and future vision for asynchronous designs.