No.031 Many-cores and On-chip Interconnects

The on-chip network paradigm appeared in the last decade as a solution for the connection of components inside a chip. While this is a covered need, the questioning is whether this paradigm is just a new domain field of already known solutions and techniques (from the off-chip communication interconnects hugely researched and practiced in the past) or challenges with new milestones to be achieved (asking for new methods and tools yet to discover). While it is commonly agreed constraints and requirements are different from the off-chip interconnect world, the current proposed solutions are highly similar and suggest an evolutionary approach. In this talk I will focus on what’s new and what’s now and will provide some basic examples of key differentiating research only applicable to on-chip networks.

The performance and energy efficiency of a multi-core system is determined by not only its processor cores but also how efficiently they collaborate with each other. As new applications continuously require more communication bandwidth, metallic interconnects gradually become the bottlenecks of multi-core systems due to their high power consumption, limited bandwidth, and signal integrity issues. Optical interconnects are promising candidates to bring low power, high bandwidth, and low latency to address inter-chip as well as intra-chip communication challenges. Silicon-based photonic devices, such as optical waveguides and microresonators, have been demonstrated in CMOS-compatible fabrication processes and can be used to build inter/intra-chip optical networks. This talk will discuss the opportunities and challenges of this emerging technology based on our recent findings.