Sep 3, 2012
Plan A (If the weather is fine on Monday)
Monday (Sep. 23)
Chip Design and Networks
○ 8:45 ?10:45
Welcome, Introducing ourselves(Chair: Tomohiro Yoneda)
Many-core Design
Hideharu Amano
Ran Ginosar
○ 11:00 ?12:20
Off-chip Network Design and Layout (Chair: John Kim)
Michihiro Koibuchi
Yuichi Nakamura
○ 1:30 ?3:30
Walking
○ 3:40 ? 5:00
On- and Off-chip Network Design (Chair: Hideharu Amano)
Ikki Fujiwara
John Kim
○ 5:10-6:30
Off-chip Networks (Chair: Jose Flich)
Yuuichirou Ajima
Olav Lysne
—————
Tuesday (Sep. 24)
NoC
○ 8:45 ?10:45
NoC Design (Chair: Tao Li)
Hiroki Matsutani
Davide Bertozzi
Krishnendu Chakrabarty
○ 11:00 ?12:20
Photonic Interconnect (1) (Chair: Davide Bertozzi)
Sébastien Le Beux
Lin Yang
○ 1:30 ?2:50
Photonic Interconnect (2) (Chair: Sébastien Le Beux)
Jiang Xu
Tsutomu Yoshinaga
○ 3:00 ? 5:00
Async Design & NoC (Chair: Ran Ginosar)
Peter Beerel
Tomohiro Yoneda
Paul V. Gratz
○ 5:15-6:30
Panel: Interconnects for Manycores
Moderator: Jiang Xu, Hong Kong University of Science and Technology
Panelist: Yuuichirou Ajima, Fujitsu
Ran Ginosar, Technion
Jose Flich Cardo, Universidad Politecnica de Valencia
Davide Bertozzi, University of Ferrara
Paul Gratz, Texas A&M University
Michihiro Koibuchi, National Institute of Informatics
—————
Wednesday (Sep. 25)
Many-core Architecture
○ 8:45 ?10:05
Many-core Architecture (Chair: Olav Lysne)
Tao Li
Eric Liang
○ 10:15-11:35
Many-core Architecture and NoC (Chair: Eric Liang)
Kenji Kise
Jose Flich
○ 11:45-12:00
Wrap-up (Chair: Jose Flich)
○ 1:45
Departure